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Reusable Analog IP – Make Your IP Intelligent with Intelligent IP

Datum & Uhrzeit

Dauer1 Stunde


NameFraunhofer IIS/EAS
AnschriftMünchner Straße
Stadt01187 Dresden, Deutschland


NameFrau Dr. Katja Lohmann-SchwitaleFraunhofer IIS/EAS
Telefon+49 351 45691 154

Analog/mixed-signal IC design is a critical challenge for ASIC development with tight specs and tapeout schedules that are not easy to meet. Especially when targeting various applications or multiple PDKs, initial efforts, design time, and risks increase. In this webinar, we will give you an insight into approaches to ease IP reuse across both PDKs and specifications by means of analog automation.